面向高速光电三维集成的硅通孔仿真设计及特性验证
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(联合微电子中心有限责任公司,重庆 401332)

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谢寒(1988-),男,重庆市人,工程师,主要研究方向为三维集成高频光电器件集成仿真设计、测试数据处理、去嵌及算法实现;基于 FPGA的数字电路系统级仿真设计与开发;图像处理算法应用优化。

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TN405

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Simulation of Through-Silicon Via Design and Characteristics for High-Speed Optoelectronic Three-Dimensional Integration
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(United Microelectronics Center Co. Ltd.,Chongqing 401332,CHN)

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    摘要:

    高速光电三维集成系统布线具有密度高、尺寸微小、结构复杂的特点。对高速光电三维集成中的纵向通路硅通孔结构进行准确的传输特性表征,能够显著提高系统可靠性、缩短开发时间和降低流片成本。文章首先结合工艺参数对高速同轴硅通孔结构进行仿真,然后设计并制备基于 L-2L去嵌方法的高速硅通孔测试结构,最后通过测试去嵌对高速硅通孔的传输特性进行表征。将测试结果与仿真结果进行对比校核,结果表明:40 GHz以内测试数据与模型仿真结果幅值百分比误差的平均值为 0. 938%,吻合度较高,验证了此仿真验证方法的准确度。该研究可用于高速硅通孔的实际设计开发,对高速光电三维集成系统设计具有重要指导意义。

    Abstract:

    The wiring of high-speed optoelectronic three-dimensional(3D)integrated systems features a high density,small size,and complex structure. Accurate characterization of vertical through-silicon via(TSV)structures in high-speed optoelectronic 3D integration can significantly improve system reliability while reducing development time and tape-out costs. In this study,a high-speed coaxial TSV structure with various parameters was simulated. Next,based on the geometrical and process parameters determined from the simulation, a proper high-speed coaxial TSV test structure based on the L-2L de-embedding method was designed and fabricated on an eight-inch process platform. Finally,the transmission characteristics of the high-speed TSV were obtained through de-embedding. A comparison between the test and simulation results reveals an average error of 0. 938% between them within 40 GHz. This result confirms the high accuracy of the simulation method,corroborating the feasibility of its application to high-speed TSV development and high-speed optoelectronic 3D integrated system design.

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谢寒,王攀,田思劼.面向高速光电三维集成的硅通孔仿真设计及特性验证[J].半导体光电,2025,46(4):693-698. XIE Han, WANG Pan, TIAN Sijie. Simulation of Through-Silicon Via Design and Characteristics for High-Speed Optoelectronic Three-Dimensional Integration[J].,2025,46(4):693-698.

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  • 收稿日期:2025-07-20
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  • 在线发布日期: 2025-08-25
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