Introduced is the design of focal plane array readout circuit, including the analog circuit and the digital circuit, for 640×512 capacitor feedback transimpedance amplifier (CTIA). For the analog circuit, it is focused on the design of CTIA sampling cell and the factors such as its area, noise and gain are optimized, and meanwhile the cell control circuit is optimized so as to realize a higher driving current. For the digital control circuit, it is focused on the implementations of such functions as line select, column select, flip read, random windows, interlaced scanning and selectable number of outputs. Verifications were performed based on 0.5μm DPTM process, the parameters as the cell area of 25μm×25μm, the operating frequency of 5MHz, the die size of 18.1mm×17.4mm, the output swing of larger than 2.5V, and the dynamic rang of beyond 70dB are realized.